There’s been no shortage of leaks concerning Intel’s next generation Nova Lake processors, and it appears that AMD will be facing stiff competition, despite the Zen 6 powered Medusa CPU’s rumored to be increasing core counts to 12 cores per CCD (24 cores / 48 threads total).
Recently a slide has appeared on twitter, but has since been nuked which claims Intel will be offering at least a 60 percent increase in Multi Thread performance, a 1.1x increase in Single Thread and, perhaps one of the more curious claims: Leadership in gaming performance.
So firstly, the rumored configuration for Intel’s next gen Nova Lake Processor is said to be up to 52 cores, split across 4 lp cores (for background / os tasks, etc), 16 high performance cores and the remaining 32 cores being E (energy efficient). Much like Arrow Lake, the P cores don’t feature hyper thread / SMT which will make curious comparisons against intel’s rival.

Tackling the claims on the single thread / MT performance first, unfortunately we’re missing the note to see what it’s compared against. I’m told it is Arrow Lake by a source, but obviously ‘told’ and officially laid out are different things entirely. Secondly, these figures aren’t IPC, but total performance of course; so would take into account more cores (though obviously not affecting ST performance), clock speeds, faster memory support (rumored to be 8000MTS), and of course IPC gains and improvements in the interconnects.

Curiously – I’ve had a source reach out and tell me that this slide is a little older, and there’s an updated slide with a 80~ percent MT figure, but with the caveat of it being at the same power as Arrow Lake. Again, because we don’t have a complete picture of power consumption etc yet, this isn’t necessarily super helpful – but it is still curious.

Another source told me 10 percent gain in Spec Int for the performance cores, but I’m uncertain if this is true as someone else told me it can be more – but given the official 1.1x ST performance figure here, I think 10 percent is a nice cautious number take in the shorter term.
But by far – the leadership in gaming performance for Nova Lake is the more curious. The Ultra 300 series is rumored to have (at least with some models) 144MB bLLC (a cache tile, which connects directly to one of the compute tiles from what the rumors are… think a bit like the 9950x3d for an easy mental image). Although, I will add – I don’t think that (like Ryzen, which sits underneat or above the tile, depending on the generation of vcache), I believe Intel bLLC might be on the ‘side’ of the compute die. But, as always we’ll wait and see. Regardless, it’s less clear if this is comparing against Ryzen 9000 series or its Zen 6 successor. My assumption would be Intel has an idea what AMD are doing for Zen 6; but it is certainly curious.

I’ll also mention that Nova Lake again switches up motherboard and sockets, with the Ultra 300 series moving to LGA-1954, frustrating for current Arrow Lake owners, but unfortunately seemingly is par-for-the-course for Intel in the more modern era.
Speculatively, I think it’s very possible the higher end Nova Lake Ultra 300 series could win out against Zen 6 for multi threading, but single thread performance will be curious, especially for gaming. Unfortunately, there’s a lot of moving parts for AMD and Intel, with bandwidth and interconnects almost perhaps a bigger part to play next generation than improvements in IPC for example. Earlier this year (Feburary) I leaked the following about Zen 6 in a video, so we’ll see how true it ends up being.
- Ryzen will be 12C per CCD, based on N2P. 2x CCD / 24 core / 48 threads total.
- Zen 6 retains 1MB L2 per core
- Clock targets are too early. I’m told that at 1.1v, about 1.15x performance can be had from the shift of N4 to N2P; but AMD might target a vmax reduction. Potentially offset with extra metal layers.
- AMD is moving from SERDES to Parallel interface; assuming this is true it could reduce latency / improve bandwidth.
- Potentially, the L3 cache is now ‘X3D’ with the CCDs sitting on top.
- Memory support appears to be the same 8000MTs as NVL
- Desktop Medusa launches H2 2026, with mobile Q1 2027



