Less than a decade ago, it was almost unthinkable that Intel could be knocked off the top of the desktop CPU world. Sure, AMD had its moments—think the original K7 Athlon era and the Athlon 64 days—but before Zen arrived, Intel looked close to untouchable.
Then AMD made a series of smart calls (and took real risks) that paid off: chiplets, aggressive platform iteration, and eventually the X3D V-Cache play that reshaped gaming performance. Intel, meanwhile, has spent a few years reacting rather than dictating terms.
With that context, I want to dig into what’s next—Titan Lake, Razor Lake, and Serpent Lake—and what Intel’s shifting roadmap might mean if the current direction holds.
Please note: Serpent Lake, Titan Lake, and much of the other information are fed to me via leaks and are therefore unofficial.
Nova Lake Comes Next, After Arrow Lake Refresh
First, a quick refresher: Nova Lake is Intel’s next true “new generation” of processors. It’s set to follow the Arrow Lake refresh that’s been circulating heavily in leaks—parts like the “270K” and “290K.”
The idea with Arrow Lake refresh is simple: keep the architecture, then push performance through a mix of:
- Higher clock speeds on the cores
- More E-cores for midrange SKUs
- Memory controller improvements (7200MT/s here we come)
Speculatively—and I’m happy to be wrong—I don’t expect Arrow Lake refresh to dramatically change the overall status quo versus AMD’s Ryzen 9000 X3D stack. If the rumored lineup pans out, AMD’s positioning is straightforward.
- A “better-binned” X3D part (same general silicon, higher clocks)
- A top-end model that benefits from X3D cache on both CCDs (effectively “two X3D caches,” one per CCD)
AMD itself confirmed the Ryzen 7 9850X3D does exist (thanks to Olrak29 on Twitter for finding this on their official website), but we’re still waiting on confirmation on the so-called Ryzen 9 9950X3D2 (and, personally, I hope that’s not the name).
If you’re Intel, that’s a hard thing to brute-force with clocks and a memory controller tune-up. That said, Arrow Lake prefers faster memory speeds, and having more e-cores on the lower-end SKUs is only ever a good thing. We’ll have to wait and see the benchmarks for a complete picture.
Nova Lake vs Zen 6: Big Core Counts and the bLLC Question
Where things get more interesting is the next-generation processors from both Intel and AMD, namely Nova Lake versus Zen 6.
The core count rumors are… spicy. The numbers I’ve been hearing suggest Nova Lake could nudge up to roughly 52 total cores, split along the lines of:
- 16 P-cores
- 32 E-cores
- 4 LP cores
One of the more notable rumors is the presence of at least one bLLC compute tile, and possibly two. While the way Intel would “attach” or implement that cache is different from AMD’s approach, conceptually you can think of it as Intel exploring the same general performance lever: more effective cache on tap for performance-sensitive workloads. As for how ‘large’ these tiles are, each bLLC is rumored to be 144MB, so in the case of the dual-tile bLLC configuration, that’s 288MB of extra cache, so Nova Lake-S is kinda crazy when you think about it.
Above, you can see well known leaker Haze talk about this on Twitter, with the halo SKU sporting the 16/32/4 configuration I’d spoken about a moment ago. Meanwhile, there will slightly cutdown version (14/24/4) using two tiles supporting bLLC, but that said, neither of these will appeal to gamers.
I’ve talked about this in previous videos, and based on what I’ve heard from a couple of sources, a dual bLLC tile variant could be expensive—positioned somewhere between today’s high-end mainstream CPUs and what we’d typically consider HEDT territory. One additional source floated a rough ballpark of $1200–$1500, but that’s more speculative, so treat it as “interesting” rather than “reliable.”
Performance-wise, the biggest question is how Nova Lake stacks up against Zen 6 in the real world. On the P-core side, I’ve heard at least a 10–15% IPC uplift, though I’m still trying to confirm what that number includes—and my current understanding is that this estimate is without bLLC in play. So, again: grain of salt. It’s promising, but at this stage it’s hard to be certain.
As alluded to above, the dual bLLC tile variants won’t be aimed at gamers, naturally, games will also benefit from bLLC, but this number of cores is unlikely to be needed by games even when UE6 relases.
So, at least from my current understanding, the single bLLC variants will be marketed/targeting gamers and the dual-tile bLLC versions primarily folks interested in higher core count/performance processors but who don’t actually require the amount of IO (eg, PCIE lanes). Speculatively, I imagine Nova Lake-S only supporting up to dual-channel memory will hurt some applications too, despite the cache.
Zen 6’s desktop incarnations (Medusa) seem all but certain to feature 24 cores, 48 threads, and remain on the AM5 platform. I’m personally hearing that IPC gains are very impressive across the board (both FP/INT) but this is combined with higher clocks, better IoD and other general improvements.
Indeed, AMD itself confirmed such big changes – I’ve covered these more extensively on the channel, but a good example is the overhaul to the Integer Scheduler. Rather than a ‘single’ one, it is now separated; their documents cover this, as you can see above. Credit to InstLatX86 for this discovery.
Titan Lake: Not a Unified Core Design (At Least Not Now)
Now, for the next-next gen CPUS, let’s try clearing up some of the confusion that’s been swirling.
There have been plenty of rumors that Titan Lake was going to be Intel’s move to a unified core design. As of what I’m hearing now, that’s not what’s Intel’s Titan Lake is. The reality is somewhat less exciting, but also intriguing from a totally different perspective as it does help set up Intel’s later CPU roadmap (you’ll see why later).
So what exactly is it then? Titan Lake appears to be shifting into a mobile-focused product, with at least a U-series and T-series variant.
The way it was described to me: think of Titan Lake as taking the general core “building blocks” of Razor Lake—Griffin Cove for P-cores and Golden Eagle for E-cores—then refining them, along with tweaks across the overall platform. The analogy I was given was Tiger Lake: not a radical reinvention, but an iteration that tightens up the full chip for mobile use cases.
On the graphics side, I’m hearing an Xe3P refresh, with more than 12 Xe units.
Alongside the GPU tile, there are supposedly broader platform changes too, including:
- (as above) XE3P Refresh (with over 12Xe units for higher end configs)
- Updates to the SoC
- LPDDR6 and LPDDR5X support (with one warning that plans could lean toward LPDDR6-only)
- A new NPU, presumably to keep up with the “AI PC” push and Windows Copilot positioning
Yes. I’m sure everyone is thrilled.
Razor Lake: Same Core Counts as Nova Lake, But More Ambition on the Cores
So where does that leave Razor Lake itself?
Intel can certainly shift design goals, and CPU core configurations can always change in the real world—SKU planning is fluid, and Intel has shown it’ll reshuffle lineups when it suits them. But the info I’m currently hearing suggests Intel’s Razor Lake’s core counts and configuration remain broadly aligned with their Nova Lake processors:
- 16 Griffin Cove P-cores
- 32 Golden Eagle E-cores
- Plus LP cores as well (likely 4)
On the performance front, I’m hearing a healthy double-digit IPC increase for the P-cores. But, I’m told Intel seems extremely fixated on E-cores right now, and I can’t get a clean, direct answer on where their (the Golden Eagle) uplift lands. If I had to guess—and this is speculation—the E-core side could see even larger relative gains than the Griffin Cove P-cores, simply because that’s where Intel appears to be leaning hard.
And why is all of the E-Core performance so important I hear you ask… well:
So When Does Unified Core Actually Happen?
That brings us to the big question: when does Intel actually ship a unified core design?
The answer I’m hearing is Intel rolls out Unified Cores with their Hammer Lake range of CPUs.
Timing is very far out. One source suggested around mid-2029, while another thinks 2030 is more realistic. Either way, this is not something that’s already deep into the “here are retail-clock engineering samples” stage. It’s distant enough that the details could change significantly.
Still, the broad concept I’m hearing is interesting: Hammer Lake cores would largely come from the teams currently leading Intel’s E-core development. Intel would then segment products in a more AMD-like way—more modular and scalable—based on things like:
- Core counts / cluster sizes
- Instruction set and feature libraries
- Cache configurations (L2, and potentially other structures)
I also believe SMT could appear on these unified cores for certain segments (server seems plausible), though I have no solid insight on what that would mean for desktop. It could show up. It could not. Too early to call.
At this stage, all I can tell you is that the Hammer Lake is said to have very lofty performance goals; but again, the processors are so far out, even if I gave IPC numbers, they could be totally missed or overshot.
Serpent Lake: Intel + Nvidia, A “Halo” Style Response
As a bonus, let’s talk about Serpent Lake, because I think it’s a super interesting product, and besides, I did tell you that Titan Lake was important, right?
Serpent Lake is being described to me as a project that involves Intel and Nvidia working together—with Nvidia providing the GPU side and Intel handling the CPU. That broader idea made waves recently, and it’s easy to see why: it’s a major strategic shift if it happens at scale.
The simplest way to frame Serpent Lake is as an answer to the “big iGPU / APU monster” category—think the general concept behind parts like Strix Halo or Medusa Halo: strong CPU performance paired with a meaningful amount of GPU horsepower.
In this case, I’m hearing:
- 16x LPDDR6
- Nvidia GPU IP likely based on Rubin RTX architecture (or a close variant)
- The Rubin-based GPU side being on TSMC N3P is the likely expectation, though process choices can change
- SoC Tiles from Titan Lake and is based (outside the GPU) on the Intel Titan Lake processor family.
Could it move to a different node? Sure. Could Intel’s fabs get involved (for the Nvidia GPU)? Intel would obviously love that business. But that comes with its own set of constraints and challenges.
Interestingly, from what I have been told about Intel’s Serpent Lake, it seems quite similar to Intel’s previously rumored and hyped Nova Lake-AX, as you can see from the Rachu leak of its specs in the above image. A single compute tile with 8P cores, 16E cores, wrapped up with a meaty 384EU iGPU. Obviously, Titan Lake is the latter CPU architecture, but there we are.
In a rather last-minute update (I was just about to click publish when I spotted this), the Intel-Nvidia deal has also been cleared by US authorities. You can read more about it on Reuters.
Final Thoughts
If even half of this roadmap holds true, Intel’s next few years look less like “one big miracle product” and more like an attempt to systematically rebuild momentum:
- Arrow Lake refresh keeps the lights on and tightens execution
- Nova Lake goes big on core count and explores cache-heavy approaches
- Razor Lake looks like the more ambitious architectural step
- Titan Lake becomes a mobile-focused refinement play
- Hammer Lake is the long-term unified-core bet
- Serpent Lake will be intriguing, and variants of it have a lot of potential for future clients (look at what AMD are doing with Strix Point Halo etc).
There’s still plenty of room for plans to shift, SKUs to change, and timelines to slide. But for the first time in a while, Intel’s roadmap sounds like it’s aiming for a coherent direction rather than just plugging holes.
And honestly? About time.
